The invention relates to an electronic trip device comprising:
a processing unit receiving current signals representative of currents flowing in a power system to be protected, comprising protection means and supplying a tripping signal when said currents exceed preset tripping values, and PA1 an initialization device for initialization of said processing unit. PA1 at least one storage register connected to the protection means to store a value of at least one quantity of a protection function and to supply a value of said at least one quantity when initialization of the processing unit is performed, PA1 a back-up power supply circuit to supply power to said at least one storage register, PA1 means for monitoring the back-up power supply circuit connected to an input of said at least one storage register to reset the value of the register to zero when a voltage of the back-up power supply circuit drops below a preset threshold.
In known electronic trip devices, tripping functions give an opening order of the circuit breaker when at least one current flowing in a pole of the circuit breaker exceeds a preset current threshold for a time greater than that corresponding to the tripping curve. Among these functions, the long delay or thermal function, the short delay or magnetic function, and the ground fault protection function can be mentioned.
Certain trip devices comprise thermal memory functions after tripping applied to the long delay function. A trip device of this kind is described in the Patents FR 2,719,169 or U.S. Pat. No. 5,617,078.
In this type of trip device, a storage device simulates the thermal behavior by using the discharge characteristics of a capacitor into a resistor. This device is well suited for a long delay thermal function with tripping and opening of the circuit breaker.
Other trip devices comprise memories to store current values or circuit breaker tripping or status information. These memories are generally RAM supplied with power by a battery or a capacitor of very high value, or EEPROM with electrical write or delete. Management of these memories is associated with tripping and initialization after tripping. If initialization is performed after power supply interruptions due to intermittent faults, it is very difficult to check the integrity of the data contained in the memories.
Thus, for intermittent faults which do not give rise to tripping but which stop the current supply to trip devices, known devices are not efficient.
Moreover, if these intermittent faults are faults processed by short delay or earth protection functions, processing initialization each time the power supply returns would be too onerous and would take too long. For example in the case of a cell with a resistor and a capacitor, one device would be required per type of protection and the charge of the capacitor would have to be controlled permanently.